Semiconductors contain complex circuits which draw significant current during use. Direct current (DC) components of the current are relatively simple to predict and account for. However, alternating current (AC) components have frequency content which must be carefully accounted for in a power distribution network design on a die, package, and printed circuit board. Traditional techniques utilize a broadband frequency compensation, which adds cost and complexity to designs. Printed circuit board manufacturers will typically need to understand how much current will be drawn when a chip is in use in order to design an optimal printed circuit board. The data will determine an amount and a location for decoupling capacitors over this printed circuit board in order to ensure the chip can operate without interference. As chip manufacturers do not have the proper tools or resources to provide a detailed analysis for the printed circuit board manufacturers, the chip manufacturers tend to over-recommend to cover a worse-case situation. This over recommendation is typically ignored by the printed circuit board manufacturers since the over recommendation would cost too much for the printed circuit board manufacturers to accommodate. That is, the chip manufacturers try to make a broad spectrum recommendation to cover all frequencies, when only certain frequencies need to be covered with respect to impedance. Thus, this approach tends to yield data of limited value for the printed circuit board manufacturers.
Accordingly, there is a need to provide a tool for chip manufacturers and printed circuit board manufacturers to better understand the dynamic current waveform to consider when placing a chip on a printed circuit board.